So after finishing the circuit in a hurry for the presentation, I started layouting the circuit. My supervisor gave me a short introduction to the tool and some documents which give further information, and I think it works fine. I think, I might be rather slow because I put a lot of thought in every placement. But maybe this spares me another layout run. At least I hope so.
As my QVCO is constructed from serveral blocks on schematic level, I tried to do the layout for the blocks first and put them together for the final layout. But a QVCO requires so much consideration about symmetrie, that I just dropped the approach and layouted the whole device in one take. I have to consider symmetrie all the time, so I have to define spaces, which are not allowed for a single block and directions that are not allowed and I always have to keep in mind, to place devices as close as possible, as long wiring means high inductive parasitics… It is easier to remember all those restrictions when I move from one structure to the next and after deciding for one quarter add it to the others.
A great difficulty is the huge number of transmission line, which I have in my circuit. Those lines serve as inductances and I do not have anything like an integrated inductor available – besides: it wouldn’t work at this high frequencies, anyway. Transmission line should not cross, need ground plane under it and sufficient distance to the neighbouring lines which makes it really a pain in the ass to place them. Currently my layout bears a strong resemblance to a harvestman: a small heap of devices in the middle of the circuit forming the body and long transmission lines forming the legs.
My supervisor already reviewd the layout in different stages of progress and said “As far as I know about layounting, this looks excellent!” He really made me feel very good about my work 😀 Thanks!
About my thesis in whole: I am still a bit behind… But I will try to write faster, once the post layout verification gives sufficient results.